Integrated circuits (ICs) can be implemented to perform a variety of functions. Some ICs can be programmed to perform specified functions. One example of an IC that can be programmed is a field programmable gate array (FPGA). An FPGA typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect circuitry and programmable logic circuitry. The programmable interconnect circuitry typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic circuitry implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect circuitry and programmable logic circuitry are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Another type of programmable IC is the complex programmable logic device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to those used in programmable logic arrays (PLAs) and programmable array logic (PAL) devices. In CPLDs, configuration data is typically stored on-chip in non-volatile memory. In some CPLDs, configuration data is stored on-chip in non-volatile memory, then downloaded to volatile memory as part of an initial configuration (programming) sequence.
For all of these programmable ICs, the functionality of the device is controlled by data bits provided to the device for that purpose. The data bits can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Other programmable ICs are programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. Programmable ICs can also be implemented in other ways, e.g., using fuse or antifuse technology. The phrase “programmable IC” can include, but is not limited to these devices and further can encompass devices that are only partially programmable including, for example, application specific integrated circuits (ASICs). For instance, another type of programmable IC includes a combination of hard-coded transistor logic and a programmable switch fabric that programmably interconnects the hard-coded transistor logic.
Some programmable ICs can be programmed to incorporate pre-developed logic and/or circuit blocks with pre-designed functionalities, i.e., “soft cores.” A soft core typically refers to a programmatic description of hardware that performs a particular function. A soft core, for example, can be specified as a hardware description language file or files, as a bitstream, or a portion thereof, that programs a programmable IC, whether fully or partially programmable, as a netlist, or the like. In other cases, a soft core can include source code or schematics that describe the logic and connectivity of a portion of a circuit design. Typical soft cores can provide, but are not limited to, DSP functions, memories, storage elements, and math functions. Some soft cores include an optimally floor-planned layout targeted to a specific family of programmable ICs. Soft cores can also be parameterizable, i.e., allowing the user to enter parameters to activate or change certain soft core functionality.
A set of configuration bits used to program programmable circuitry of a programmable IC such as an FPGA is conventionally referred to as a configuration bitstream. Programmable circuitry can include CLBs, PIPs, IOBs, or other programmably configurable circuit blocks, interconnects, or inputs/outputs. Register settings may be set via a configuration bitstream; however, hardwired registers generally are not considered to be programmable logic.
A hardwired core, or “hard core,” such as an ASIC core, is not a soft core. A soft core is instantiated (e.g., implemented) in programmable logic after manufacture of an IC, whereas a hardwired core is manufactured as part of the IC. Furthermore, conventionally a hardwired core is thought of as having generally dedicated circuit blocks, interconnects, and inputs/outputs, even though a portion of a hardwired core may be set to operate responsive to register settings or other storage elements.
Many circuits, whether implemented within a programmable IC, a non-programmable IC, or specified as a soft core or a hard core, are designed to enter or implement a low power state. Typically, the circuit enters the low power state responsive to detecting some predetermined condition or set of conditions. For example, after a predetermined period of inactivity, the circuit can enter a low power state to conserve energy. In some cases, the circumstances under which the circuit enters the low power state are dictated by one or more governing standards to which the circuit must adhere. In other cases, the circuit designer has discretion to specify the particular conditions that must exist for the circuit to enter the low power state.